Jaehyek Choi Embedded/Firmware Engineer

eMMC UFS Issues 08

2016-12-26
Jaehyek

Component Feature

  • 64GB UFS 2.1 3D
  • Controller :
  • Hy

Failure Symptom

  • Under lower temperature ( -30 degree )
  • Enter the Sleep Mode
  • Enter/Exit Fail

Failure procedure

  • The NMOS TR Vt increment of PLL (Phase Locked Loop) circuit within UFS controller does not work properly
  • Inspecting Device Tx data line Eye diagram, the lower temperature jitter value was not work properly 001 004

Cause

  • caused by the thickness increment of TR gate oxide during foundry Fab.(TSMC, 28nm) 002 003

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